dcr 4720a 34 phase control thyristor ds6051 - 1 april 201 1 (ln28262 ) 1 / 10 www.dynexsemi.com features ? double side cooling ? high surge capability applications ? high power drives ? high voltage power supplies ? static switches voltage ratings part and ordering number repetitive peak voltages v drm and v rrm v conditions dcr 4720a34 dcr 4720a32 dcr 4720a30 dcr 4720a28 dcr 4720a26 dcr 4720a24 34 00 32 00 30 00 2800 2600 2400 t vj = - 40c to 125c, i drm = i rrm = 4 00 ma, v drm , v rrm t p = 10ms, v dsm & v rsm = v drm & v rrm + 100 v respectively lower voltage grades available. ordering information when ordering, select the required part number shown in the voltage ratings selection table. for example: dcr 472 0a 34 note: please use the complete part number when ordering and quote this number in any future correspondence relating to your order. key parameters v drm 34 00 v i t(av) 472 0 a i tsm 69 0 00 a dv/dt* 1000 v/s di/dt 2 5 0 a/s * higher dv/dt selections available fig. 1 package outline outline type code: a (see package details for further information)
semiconductor dcr 4720a 34 2 / 9 www.dynexsemi.com current ratings t case = 60c unless stated otherwise symbol parameter test conditions max. units double side cooled i t(av) mean on - state current half wave resistive load 4720 a i t(rms) rms value - 7410 a i t continuous (direct) on - state current - 6670 a surge ratings symbol parameter test conditions max. units i tsm surge (non - repetitive) on - state current 10ms half sine, t case = 125c 69 . 0 ka i 2 t i 2 t for fusing v r = 0 23.81 ma 2 s thermal and mechanical ratings symbol parameter test conditions min. max. units r th(j - c) thermal resistance C junction to case double side cooled dc - 0.0 05 7 c/w r th(c - h) thermal resistance C case to heatsink double side cooled dc - 0.0 0 15 c/w t vj virtual junction temperature blocking v drm / vrrm - 125 c t stg storage temperature range - 40 140 c f m clamping force 80 100 kn
semiconductor dcr 4720a 34 3 / 9 www.dynexsemi.com dynamic characteristics symbol parameter test conditions min. max. units i rrm /i drm peak reverse and off - state current at v rrm /v drm , t case = 125c - 4 00 ma dv/dt max. linear rate of rise of off - state voltage to 67% v drm , t j = 125c, gate open 1000 - v/s di/dt rate of rise of on - state current from 67% v drm to 4 000a repetitive 50hz - 2 5 0 a/s gate source 30v, 10 ? , non - repetitive - 1000 a/s t r < 0.5s, t j = 125c v t on - state voltage i t = 30 00a, t case = 125c 1. 21 v v t(to) threshold voltage t case = 125c - 0. 8 6 v r t on - state slope resistance t case = 125c - 0. 115 m ? t gd delay time v d = 67% v drm , gate source 30v, 10 ? - 3.0 s t r = 0.5s, t j = 25c t q turn - off time t j = 125c, v r = 100v, di/dt = 1.5 a/s, - 600 s dv dr /dt = 20v/s linear to 67% v drm q s stored charge i t = 2 000a, tp = 1000us,t j = 125c, di/dt = 1 .5 a/s, - 4 000 c i rr reverse recovery current - 100 a i l latching current t j = 25c, - 1 a i h holding current t j = 25c, - 200 ma gate trigger characteristics and ratings symbol parameter test conditions max. units v gt gate trigger voltage v drm = 5v, t case = 25c 3 v v gd gate non - trigger voltage at 4 0% v drm, t case = 125c tbd v i gt gate trigger current v drm = 5v, t case = 25c 300 ma i gd gate non - trigger current at 4 0% v drm, t case = 125c tbd ma
semiconductor dcr 4720a 34 4 / 9 www.dynexsemi.com curves v tm equation v tm = a + bln (i t ) + c.i t +d. ? i t where a = 0.892089 b = - 0.00870174 c = 0.000107338 d = 0.0011654 t hese values are valid for t j = 125 c fig. 2 maximum &minimum on - state characteristics i i (s) r thi ( c/k w) 1 0. 8296 3. 709 2 0. 1107 1.262 3 0.011 4 0. 475 4 0.00 24 0. 251 fig. 3 maximum (limit) transient thermal im pedance C junction to case (c/ w) 0 1000 2000 3000 4000 5000 6000 7000 8000 9000 10000 0.5 1 1.5 2 2.5 instantaneous on - state current, i t - (a) instantaneous on - state voltage,v t - (v) tj=125 c 0 0.002 0.004 0.006 0.008 0.001 0.01 0.1 1 10 100 thermal impedance zth(j - c) ( c/w ) time ( s ) double side cooled ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? n i t thi thjc i e r t r 1 1 ?
semiconductor dcr 4720a 34 5 / 9 www.dynexsemi.com fig. 4 on - state power dissipation C sine wave fig. 5 maximum permissible case temperature, double side cooled C sine wave fig. 6 maximum permissible case temperature, double side cooled C rectangular wave fig. 7 on - state power dissipation C rectangular wave 0 3000 6000 9000 12000 15000 0 1000 2000 3000 4000 5000 mean power dissipation - (w) mean on - state current, i t(av) - (a) 180 120 90 60 30 0 10 20 30 40 50 60 70 80 90 100 110 120 130 0 1000 2000 3000 4000 5000 maximum case temperature, t case - ( c) mean on - state current, i t(av) - (a) 180 120 90 60 30 0 10 20 30 40 50 60 70 80 90 100 110 120 130 0 1000 2000 3000 4000 5000 maximum case temperature, tcase - ( c) mean on - state current, i t(av) - (a) d.c. 180 120 90 60 30 0 3000 6000 9000 12000 15000 0 1000 2000 3000 4000 5000 mean power dissipation - (w) mean on - state current, i t(av) - (a) d.c. 180 120 90 60 30
semiconductor dcr 4720a 34 6 / 9 www.dynexsemi.com fig. 8 multi - cycle surge current fig. 9 single - cycle i 2 t fig . 10 gate characteristics 20.0 30.0 40.0 50.0 60.0 70.0 80.0 90.0 100.0 1 10 100 surge current, i tsm - (ka) number of cycles conditons: t case =125 c v r =0 pulse width = 10ms 10.00 15.00 20.00 25.00 30.00 35.00 40.00 1 10 i 2 t (ma 2 s) pulse width, t p - (ms) conditons: t case =125 c v r =0 half - sine wave 0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.50 4.00 4.50 0 50 100 150 200 250 300 350 400 450 500 gate trigger voltage, v gt - (v) gate trigger current i gt , - (ma) tj=25 c tj=125 c upper limit tj= - 40 c lower limit
semiconductor dcr 4720a 34 7 / 9 www.dynexsemi.com a is recommended triggering area. b is unreliable triggering area. c is recommended gate load line. fig .1 1 gate characteristics 0.0 2.0 4.0 6.0 8.0 10.0 12.0 0.0 1.0 2.0 3.0 4.0 gate trigger voltage, v gt - (v) gate trigger current i gt , - (a) b c a p gm =20w
semiconductor dcr 4720a 34 8 / 9 www.dynexsemi.com package details for further package information, please contact customer services. all dimensions in mm, unless stated otherwise. do not scale. package outline type code: a fig.1 2 package outline
semiconductor dcr 4720a 34 9 / 9 www.dynexsemi.com important information: this publication is provided for information only and not for resale. the products and information in this publication are intended for use by appropriately trained technical personnel. due to the diversity of product applications, the information contained herein is provided as a general guide only and does n ot constitute any guarantee of suitability for use in a specific application . the user must evaluate the suitability of the product and the completeness of the product data for the application. the user is responsible for product selection and ensuring all safety and any warning r equirements are met. should addi tional product information be needed please contact customer service. although we have endeavoured to carefully compile the information in this publication it may contain inaccuracies or typograp hical errors. the information is provided without any warran ty or guarantee of any kind. this publication is an uncontrolled document and is subject to change without notice. when referring to it please ensure that it is the most up to date version and has not been superseded. the products are not intended for us e in applications where a failure or malfunction may cause loss of life, injury or damage to property. the user must ensure that appropriate safety precautions are taken to prevent or mitigate the consequences of a product failu re or malfunction. the prod ucts must not be touched when operating because there is a danger of electrocution or severe burning. always use protective safety equipment such as appropriate shields for the product and wear safety glasses. even when disconnected any electric charge rem aining in the product must be discharged and allowed to cool before safe handling using protective gloves. extended exposure to conditions outside the product ratings may affect reliability leading to premature product failure. use outside the product rat ings is likely to cause permanent damage to the product. in extreme conditions, as with all semiconductors, this may include potentially hazardous rupture, a large current to flow or high voltage arcing, resulting in fire or explosion. appropriate ap plicat ion design and safety precautions should always be followed to protect persons and property. product status & product ordering: we annotate datasheets in the top right hand corner of the front page, to indicate product status if it is not yet fully appr ov ed for production. the annotations are as follows: - target information: this is the most tentative form of information and represents a very preliminary specification. no actual design work on the product has been started. preliminary information: the product design is complete and final characterisation for volume production is in progress.the datasheet represents the product as it is now understood but details may change. no annotation: the product has been approved for production and unless othe rwise notified by dynex any product ordered will be supplied to the current version of the data sheet prevailing at the time of our order acknowledgement. all products and materials are sold and services provided subject to dynexs conditions of sale, whi ch are available on request. any brand names and product names used in this publication are trademarks, registered trademarks or trade names of their respective owners. headquarters operations dynex semiconductor limited doddington road, lincoln, lincolnshire, ln6 3lf united kingdom. phone: +44 (0) 1522 500500 fax: +44 (0) 1522 500550 web: http://www.dynexsemi.com customer service phone: +44 (0) 1522 502753 / 502901 fax: +44 (0) 1522 500020 e - mail: power_solutions @dynexsemi.com ? dynex semiconductor ltd. technical documentation C not for resale .
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